Difference between revisions of "News"
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[http://icl.cs.utk.edu/papi/news/news.html?id=203 Support for Intel Core i7 (Nehalem)] | [http://icl.cs.utk.edu/papi/news/news.html?id=203 Support for Intel Core i7 (Nehalem)] | ||
PAPI now supports Intel's new Core i7 (Nehalem) processor. | PAPI now supports Intel's new Core i7 (Nehalem) processor. | ||
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| + | ==January 22 2009== | ||
| + | [http://www.cs.uoregon.edu/research/tau/news.php TAU v2.18.1 released] | ||
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| + | TAU can now interface with PGI's runtime library and extract performance information associated with kernels that execute on the GPGPUs. TAU tracks the interactions with the GPGPU as seen from the host and generates the performance data. This data includes the name of the routine, file, line number as well as block and grid sizes and individual variable names. This feature works with PGI 8.0.3+ compilers that support the #acc region/end region directives. These source annotations may be placed around loops to automatically generate GPGPU code that executes on CUDA enabled NVidia cards. Users do not need to write any GPGPU specific code explicity. Instead, they use a compiler flag (-ta=nvidia) to generate this code using a special add-on package with the PGI compiler. | ||
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| + | This release improves support for Charm++ and NAMD. We have a [http://www.nic.uoregon.edu/tau-wiki/Guide:NAMDTAU wiki page] that describes how to build and use TAU with NAMD. | ||
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==November 10 2008== | ==November 10 2008== | ||
Revision as of 21:53, 14 July 2009
Contents
July 10 2009
Scalasca 1.2 released Includes improved support for OpenMP & hybrid MPI/OpenMP codes, MPI File I/O analysis, PGI compilers, Cray XT & NEC-SX, a new User Guide, and numerous other bug fixes & improvements.
July 10 2009
CUBE 3.2 released Stand-alone distribution of the graphical user interface component of Scalasca 1.2.
January 23 2009
Support for Intel Core i7 (Nehalem) PAPI now supports Intel's new Core i7 (Nehalem) processor.
January 22 2009
TAU can now interface with PGI's runtime library and extract performance information associated with kernels that execute on the GPGPUs. TAU tracks the interactions with the GPGPU as seen from the host and generates the performance data. This data includes the name of the routine, file, line number as well as block and grid sizes and individual variable names. This feature works with PGI 8.0.3+ compilers that support the #acc region/end region directives. These source annotations may be placed around loops to automatically generate GPGPU code that executes on CUDA enabled NVidia cards. Users do not need to write any GPGPU specific code explicity. Instead, they use a compiler flag (-ta=nvidia) to generate this code using a special add-on package with the PGI compiler.
This release improves support for Charm++ and NAMD. We have a wiki page that describes how to build and use TAU with NAMD.
November 10 2008
The POINT team will have a large presence at SuperComputing 2008 including our full day tutorial Monday (8:30am-5:00pm) and our BOF presentation on Tuesday (12:15pm-1:15pm).
You can also find our team at their respective booths:
* National Center for Supercomputing Applications (booth 351) * University of Oregon at the NNSA ASC (booth 521) * Pittsburgh Supercomputing Center (booth 741)
June 9th 2008
We have a put together a Poster (PDF) for TeraGrid '08, it provides a good introduction to the POINT project.
March 21st 2008
HPC wire has written an article about our project, here is the link.
February 8th 2008
The first iteration of the website has been deployed; take a look around and learn more about our project.
