Chapter 3. Introduction to Caches

Table of Contents

3.1. Motivation for Caches
3.2. Cache Lines and Cache Size
3.3. Replacement Policies
3.4. Cache Misses
3.5. Data Locality
3.6. Prefetching
3.6.1. Software Prefetching
3.6.2. Hardware Prefetching
3.7. Multithreading and Cache Coherence
3.8. Fetch Ratio
3.9. Upgrade Ratio
3.10. Write-Back Ratio
3.11. Memory Bandwidth

To be able to optimize a program for efficient processor cache usage some knowledge of how caches work is required. This chapter will give you a basic introduction to caches.

Processors may use un-cached memory regions for low-level I/O. Some processors can map fast private memory banks into parts of the memory space instead of using a cache. There may also be special memory access instructions that do not use the cache that can be used in some situations. This chapter only considers regular memory accesses, and ignores these special cases.