Keynote Speakers

Bob Blainey

Wednesday, 12 June 2013, 8:30-9:30

Speaker: Bob Blainey
IBM Fellow

Title: Business Meets Supercomputing


Organizations of all size, whether in business or government are recognizing the strategic role of data and the huge challenge they have to derive value from it. Consumer businesses want to better understand and engage with their customers. Logistics companies want to better optimize their operations. Governments want to find ways to deliver services more effectively and to reduce costs. We see the same patterns repeat across multiple industries. Conventional data management and data mining techniques are breaking down because of the huge volumes of data that need to be processed, because of the variety of ways that data is collected and stored and because of the need to make decisions quickly and on the most current information. The convergence of these trends is creating new opportunities for innovation in algorithms, programming models and computer architecture. In this talk, I will offer a perspective on the emerging field of business analytics on big data and explore connections with the world of high performance computing.

About the Speaker

Bob is an IBM Fellow and the technical architect of the Hardware Acceleration Laboratory in IBM's Software Group. Bob has been with IBM for over 20 years, with a consistent focus on deep optimization of software for IBM systems. He spent many years working on program transformations for parallelism and for high performance on systems such as IBM Power and System z. More recently, Bob has had a focus on re-imagining the relationship between software and hardware in the post-scaling world, which includes optimization of IBM systems and software in the short term and the creation of new system structures in the longer term using disruptive technologies.

James Smith

Friday, 14 June 2013, 8:30-9:30

Speaker: James (Jim) Smith
Emeritus Professor, Department of Electrical and Computer Engineering, University of Wisconsin, Madison

Title: The Role Of Computer Designers In Reverse-Engineering The Brain


A truly grand challenge for science in general, and for computer architects and designers in particular, is to understand the mammalian brain’s computing paradigm and then construct a computing device that embodies that paradigm. Although computer designers have a potential role to play in solving this grand challenge, it is up to us to define that role. From a computer designer’s perspective, I will illustrate the current understanding of the brain’s computational paradigm by describing several examples from experimental neuroscience. I will suggest an architecture hierarchy and discuss issues that arise when translating from the complex, asynchronous, electro-chemical device, which is the brain, to a synchronous digital device capable of performing computation in the same manner. This translation presents many difficult challenges that will require science-inspired insight and discovery, added to the challenges of engineering a very large, unconventional digital system. But, as difficult as they may be, these challenges provide almost unlimited opportunities for forward-looking, risk-taking computer architects and designers.

About the Speaker

James E. Smith is Professor Emeritus in the Department of Electrical and Computer Engineering at the University of Wisconsin-Madison. He received his PhD from the University of Illinois in 1976. He then joined the faculty of the University of Wisconsin-Madison, teaching and conducting research -- first in fault-tolerant computing, then in computer architecture. He retired from the University of Wisconsin in 2007. He has been involved in a number of computer research and development projects both as a faculty member at Wisconsin and in industry (Control Data Corporation, Astronautics Corporation, Cray Research, Google, and Intel).

Prof. Smith made a number of significant contributions to the development of superscalar processors. These contributions include the basic mechanisms for dynamic branch prediction and implementing precise traps. He has also studied vector processor architectures and worked on the development of a number of microarchitecture paradigms: decoupled processors, clustered processors, and trace processors. He received the 1999 ACM/IEEE Eckert-Mauchly Award for these contributions.

More recently, Prof. Smith has focused on the virtual machine abstraction as a technique for providing high performance and power efficiency through co-design and tight coupling of virtual machine hardware and software. He is co-author, with Ravi Nair, of a book on Virtual Machines. Currently, he works at home along the Clark Fork near Missoula, Montana.

Steve Teig

Thursday, 13 June 2013, 8:30-9:30

Speaker: Steve Teig
President and CTO, Tabula

Title: Function, Latency, Bandwidth, Power: Towards A Better Computer


Computation in practice consists of executing functions, usually with the intention of achieving all three of correctness, high throughput, and low latency. Unfortunately, the most popular ways to specify functions - e.g., C++, Java, etc. - have not advanced significantly in 20 years. Mainstream software is hard to reason about and lacks any means of even expressing throughput or latency requirements, much less satisfying them. On the hardware front, the throughput of uniprocessors has barely increased in 10 years, yet developing efficient algorithms for multi-core processors remains ad hoc and frequently fails. Latency is no longer improving either - - because multiple cores now compete for limited, off-chip memory bandwidth, and each core needs access to lots of off-chip memory. Finally, the ever-increasing need for communications throughput for datacenters, the Internet, and mobile devices is at odds with the importance of decreasing power consumption. What is a supercomputing community to do? (Hint: I believe that it is neither multi-core microprocessors nor GPUs.)

About the Speaker

Steve Teig is the President and Chief Technology Officer of Tabula and the inventor of Tabula's Spacetime 3-Dimensional Programmable Logic Architecture. In 2012, Tabula has been recognized with an Edison Award, an American Business Gold Award, inclusion in MIT's "TR50" list of the 50 most innovative companies worldwide, and as #3 in the Wall Street Journal's "Next Big Thing" list of the most promising venture-backed startup companies. Prior to founding Tabula, Steve was CTO of Cadence Design Systems, having joined Cadence through its acquisition of Simplex Solutions, where he was also CTO. Prior to Simplex, he was CTO of two successful biotechnology companies: CombiChem and BioCAD. Earlier in his career, he developed foundational logic simulation and place-and-route technologies that continue to have far-reaching influence. Steve received a B.S.E. degree in Electrical Engineering and Computer Science from Princeton University and holds over 250 patents. In 2011, he was awarded the World Technology Award for IT hardware innovation.